1. The present invention relates to the field of Programmable Logic Devices. More particularly, the present invention relates to low noise, temperature-compensated and process-compensated current and voltage control circuits in Programmable Logic Devices.
2. Description of the Prior Art
FIG. 1 depicts a typical circuit of a prior art Programmable Logic Device used to provide a current and bias voltage for a bit line connected to a sensing circuit. The circuit of FIG. 1 is comprised of a reference current and voltage generator circuit 10 and a bit line current and bias voltage control circuit 20.
The prior art reference current and voltage generator 10 is comprised of an N-channel transistor N1 and a P-channel transistor Pl. The gate of the N-channel transistor N1 is connected to a signal V1. The drain of the N-channel transistor N1 is connected to the drain of transistor Pl. The gate of transistor P1 is shorted to its drain as shown in FIG. 1.
Since the gate to source voltage of transistor N1 is determined by the voltage V1, the current flowing through transistor N1 is also determined by the voltage V1. This current also flows through transistor P1. Thus, the gate to source voltage of the transistor P1 is fixed by the current forced by transistor N1 to flow through transistor P1. Therefore, the reference current generated by transistor N1, in response to the voltage V1, generates a reference voltage at the gate of transistor P1. This reference voltage is therefore a representation of the reference current flowing through transistor N1.
The reference voltage generated by circuit 10 can be used to generate a current equal to the reference current of circuit 10 in the bit line current and bias voltage control circuit 20. The bit line current and bias voltage control circuit 20 is comprised of the P-channel transistor P2, N-channel transistor N2, bit line 22, transistor cells such as Tl, and finally an invertor 24. Since transistor P2 has the same gate to source voltage as transistor Pl, a current equal to the current flowing through transistor Pl of circuit 10 is generated by transistor P2 of circuit 20. As such, the current flowing through the bit line 22 is approximately equal to the reference current generated by circuit 10. Moreover, the bias voltage of the input at node 26, is determined by inverter 24 of the bit line current and bias voltage control circuit 20. This bias voltage connected to the input of the sensing circuit 30 is approximately equal to the trigger voltage of the invertor 24. Still referring to circuit 30 of FIG. 1, an N-channel transistor N2, which is driven by a signal V2, is used to establish a difference between the voltage at node 26, and the voltage of the bit line 22.
However, the prior art circuit of FIG. 1 used for providing a current for the bit line 22 and a bias voltage for a sensing circuit 30 has certain shortcomings. More particularly, the prior art circuit of FIG. 1 passes substantially all the supply voltage noise to node 26 through transistor P2. Furthermore, the current flowing from transistor P2 to the bit line 22 of circuit 20, like the current of a typical semiconductor circuit, increases in response to declining ambient temperature. However, since a semiconductor Programmable Logic Device typically has eighty current control and voltage bias circuits 20, the additional current for the cold ambient condition is typically about fifteen milliamperes. This current adds a large amount of power consumption to the total power consumption of a typical semiconductor Programmable Logic Device at the cold ambient condition. Also, according to the prior art reference current and voltage generating circuit 10, signal V1 driving transistor N1 typically has wide voltage swings in response to semiconductor processing variations of a semiconductor Programmable Logic Device. These wide voltage swings of signal Vl in turn cause large variations in the reference current generated by transistor N1.
Thus, one object of the present invention is to overcome the aforementioned shortcomings of the typical prior art current and bias voltage control circuit shown in FIG. 1. Therefore, it is an object of the present invention to reduce the supply voltage noise transmitted to the input of a sensing circuit such as the sensing circuit 30 of FIG. 1. Further, it is another object of the present invention to reduce the increased low-temperature current flow through a transistor cell bit line, such as the bit line 22 of FIG. 1. It is yet another object of the present invention to reduce process dependent voltage fluctuations of the input of a reference current and voltage generator such as the input signal Vl driving the gate of transistor N1 in circuit 10 of FIG. 1.